The field of the invention is that of microelectronic circuits. More precisely, the invention relates to the activation or deactivation of inputs/outputs, or of sets of inputs/outputs, (also termed hereinbelow “input/output buffers”, when there are problems, and particularly when there is a power failure.
A specific field of application is to smart card readers, for which it is necessary to keep to a specific deactivation sequence when there is a power failure. However, the invention may be applied more generally to any circuit having to keep to a particular input/output activation and/or deactivation sequence, particularly when there is a power failure.
In the known systems, when a circuit undergoes a power failure, a power failure detector (PFD) enables emergency passing to a reset mode which prevents the microprocessor or a similar component, and internal memories, from performing erroneous operations.
For example, in the case of a conventional circuit having a typical supply VCC of 3V, and 2.7V minimum, the voltage Vreset for passing into reset mode is 2.4V, to protect the circuit (operating at x MHz) when the logic VCCmin is about 1.2V. The circuit then functions, but at a low frequency.
In certain applications, it is necessary to keep to a particular deactivation sequence when there is a power failure. This is the case for smart card readers. These have three communication inputs/outputs:    CCLK (clock of external smart card)    CRST (reset of this smart card)    CIO (enabling data transfer).
During a transaction between the smart card reader and a smart card, there is an exchange of information. During this transaction, and when there is a power fall-off, it is necessary to stop the communication. Thus a specification ISO7816 stipulates that CRST has first to be forced to 0, then CCLK and finally CIO.
When the power fall-off detector PFD places the microprocessor in reset, operations may no longer take place. According to the prior art, it is then this PFD reset command which places the three inputs/outputs of the card to 0 at the same time.
In fact, the microprocessor can no longer space these three communications over several clock cycles, since it is stopped and therefore no longer functional when the microprocessor is under reset.
Consequently no present circuit is effective, nor responds to the future ISO standard.